/**
  ******************************************************************************
  * @file    bs32f1xx_ll_lpw.c
  * @author  MCU Application Team
  * @brief   LPW LL module driver.
  ******************************************************************************
  */
#if defined(USE_FULL_LL_DRIVER)

/* Includes ------------------------------------------------------------------*/
#include "bs32f1xx_ll_lpw.h"

#ifdef  USE_FULL_ASSERT
#include "bs32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
/** @addtogroup BS32F1xx_LL_Driver
  * @{
  */

/** @addtogroup LPW_LL LPW
  * @{
  */

/* Exported functions --------------------------------------------------------*/
/** @addtogroup LPW_LL_Exported_Functions 
  * @{
  */

/**
  * @brief  Processor uses sleep as its low power mode
  * @retval None
  */
void LL_LPW_EnterSleepMode(void)
{
  /* Clear SLEEPDEEP bit of Cortex System Control Register */
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
	__WFI();
}

/**
  * @brief  Processor uses deep sleep as its low power mode
  * @retval None
  */
void LL_LPW_EnterDeepSleepMode(void)
{
	LPW->SHD_EN = 0;
	
  /* Set SLEEPDEEP bit of Cortex System Control Register */
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
	
	__WFI();
	
	CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
}

/**
  * @brief  Processor uses shutdown as its low power mode
  * @retval None
  */
void LL_LPW_EnterShutDownMode(void)
{
	LPW->SHD_EN = 1;
	
  /* Set SLEEPDEEP bit of Cortex System Control Register */
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
	
	__WFI();
	
	/* Wake Up and Reset */
	
}

/**
  * @}
  */

/**
  * @}
  */

/**
  * @}
  */ 
#endif /* USE_FULL_LL_DRIVER */

/************************ (C) COPYRIGHT BSMicroelectronics *****END OF FILE****/

